| Title |
Effective Cu Filling Method to TSV for 3-dimensional Si Chip Stacking |
| Authors |
홍성철(Sung Chul Hong); 정도현(Do Hyun Jung); 정재필(Jae Pil Jung); 김원중(Won Joong Kim) |
| DOI |
https://doi.org/10.3365/KJMM.2012.50.2.152 |
| ISSN |
1738-8228(ISSN), 2288-8241(eISSN) |
| Keywords |
electronic materials; plating; defects; scanning electron microscopy; SEM; bottom-up ratio |
| Abstract |
The effect of current waveform on Cu filling into TSV (through-silicon via) and the bottom-up ratio of Cu were investigated for three dimensional (3D) Si chip stacking. The TSV was prepared on an Si wafer by DRIE (deep reactive ion etching); and its diameter and depth were 30 and 60㎛, respectively. SiO2, Ti and Au layers were coated as functional layers on the via wall. The current waveform was varied like a pulse, PPR (periodic pulse reverse) and 3-step PPR. As experimental results, the bottom-up ratio by the pulsed current decreased with increasing current density, and showed a value of 0.38 on average. The bottom-up ratio by the PPR current showed a value of 1.4 at a current density of -5.85 mA/cm2, and a value of 0.91 on average. The bottom-up ratio by the 3-step PPR current increased from 1.73 to 5.88 with time. The Cu filling by the 3-step PPR demonstrated a typical bottom-up filling, and gave a sound filling in a short time. |